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Core-Microconverter-Slide31

The interrupt vector table is located at 0 hex in a remappable area that can be configured to lie in FLASH or SRAM. As discussed previously, faster code execution is possible for interrupt handling if the code is placed in SRAM. The interrupts have 2 priority levels, a standard interrupt level, called an IRQ, or a prioritized level called, an FIQ or fast IRQ. There are 23 individual interrupt sources on-chip from the various peripherals which can be enabled or disabled by user software as required. The length of time to respond to an interrupt will vary depending on the current instruction being executed. The maximum time that this could take is 29 cycles when executing from RAM and 34 cycles when executing from FLASH.

PTM Published on: 2006-06-30