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Core-Microconverter-Slide22

This slide highlights the key features of the ADuC702x family of ARM7TDMI based devices. The ARM7 processor is based on a 32-bit Von Neumann architecture that uses a single 32-bit bus for both instructions and data. This core operates at a maximum of 41MHz with the core clock being user selectable via the on-chip PLL. Assuming that single cycle 32-bit instructions are processed, this part will offer 41 MIPS peak performance. Additionally, this core also integrates a JTAG test port which allows users to non-intrusively debug code in-circuit and use development tools from a number of different manufacturers.

PTM Published on: 2006-06-30