The MAX® V is well suited to address common CPLD applications such as interface bridging (i.e. bus bridging), where control or data is buffered by the MAX® device. For example, proprietary or specialized protocols like SPI or I²C translated to standard address and data busses.  Additionally this includes I/O voltage translation. Another typical application is system configuration, in which many designs have MAX® devices sitting on the board right next to an FPGA controlling FPGA configuration. Sometimes it is more cost-effective and efficient to have a MAX® CPLD and a multi-purpose flash device controlling FPGA configuration. Increasingly ASICs, ASSPs and DSPs need initialization at power-up as well. I/O expansion is another application example. This is a collection of functions such as address decode of the I/O bus to generate peripheral chip selects or resets and interrupt control. The MAX® device can be used as a low-cost and custom I/O expander such as when a microprocessor and microcontroller do not have enough port I/Os. Last in this group of applications is power-up sequencing. Board designs are getting more complex, with more power supplies and more resets. MAX® devices are able to handle all the power-up sequencing control signals (non-volatile logic) and are able to control reset release and chip selects in a low-cost, customizable solution. Many customers tweak power-up sequences in prototyping and need a programmable logic device to do so.