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ADC-Slide7

The ADDSTR register is an 8-bit register that is used to modify the sampling time of the ADC system. The adjustment can be used to lengthen the sample time when the source impedance is high or the number of sample clocks can be reduced if the peripheral clock (PCLK) is slow. The sampling time can be calculated by dividing the value in the ADDSTR register by the frequency of the ADCLK. The address and value for the ADDSTR register after reset are shown on this page for the RX62N group. The hardware manual should be checked for the minimum allowable setting, for the RX62N the minimum setting is 02h.

PTM Published on: 2011-11-10