At the heart of the T4240/T4160 is the e6500 core. This is NXP’s second generation of 64 bit core, which is required in high performance systems for access to large memory spaces. It is NXP’s first instantiation of multi-threading. NXP’s innovative “fused core’” approach to threading means that each thread has almost a full core’s complement of resources, and performance scales well as cores are added. The manifestation of this performance can be seen in the CoreMark benchmark. Not only does it have the high performance, but it also delivers that performance at low power levels. The e6500 core has advanced virtualization features to support multiple operating systems to safely co-exist within the SOC. The hypervisor ensures that instructions and memory accesses issued by a core will not impact a different partition of cores. The LRAT facilitates memory mapping when a guest OS is supervised by the Hypervisor, and can improve performance by 10-15%. Each core has an Altivec 128b single-instruction multiple data engine, which has been widely used for DSP-like functions for signal processing and image processing. It has been widely adopted in military/aerospace applications for sonar, radar, and displays, as well as in industrial applications for image recognition.