Discussed here is why a gate driver with a lower undervoltage lockout is better suited for driving silicon junction MOSFETs and why a gate driver with a higher undervoltage lockout is better suited for driving silicon carbide MOSFETs. On the left side of the slide is a silicon junction MOSFET, and on the right side is a silicon carbide MOSFET. Looking at the left side, the customer will see that the NCP51561 is responsible for turning the MOSFET on and off. To turn the silicon junction MOSFET on, the NCP51561 drives the V_GS, or the gate-to-source voltage, from 0 V to 10 V (captured on the y-axis), assuming the V_GS is either 130 V or 400 V. When the V_GS equals 10 V, the MOSFET is fully turned on, or conducting, exhibiting its lowest specified resistance between the drain and source, or R_DS(on). A low R_DS(on) exhibits lower conduction losses, and therefore dissipates less power; a benefit to most, if not all applications. Likewise, the NCP51561 turns the MOSFET off by driving the V_GS from 10 V to 0 V. When the V_GS is 0 V, the MOSFET is fully turned off, dissipating very little power because there is an extremely high impedance between the drain and source, and the gate driver is basically off. The x-axis of both plots captures the total gate charge, or Q_g, in nano coulombs (nC). The gate driver needs to source current in order to efficiently turn on the MOSFET from a V_GS of 0 V to 10 V. Likewise, the gate driver needs to sink current in order to efficiently turn off the MOSFET from a V_GS of 10 V to 0 V. Think of Q_g as weight that the gate driver needs to lift in order to turn on the MOSFET as well as turn off the MOSFET. The gate driver’s source and sink capabilities are the muscles for lifting that weight. So, a larger Q_g requires higher gate drive source and sink current. The power dissipated while turning the MOSFET on and off is called switching loss, while conduction loss is realized when the MOSFET is fully turned on.