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LPC29xx Microcontrollers Slide 56
There are three Serial Peripheral Interface (SPI) modules to enable synchronous serial communication with slave or master peripherals that have either the Motorola SPI or Texas Instruments synchronous serial interfaces. The key features of these modules include: slave or master operation, up to four slaves in sequential multi-slave operation, and a programmable clock bit rate and prescaler based on the SPI source clock (BASE_SPI_CLK), independent of the system clock. The SPI modules also feature separate transmit and receive FIFO memory buffers, each 16 bits wide and 32 locations deep. The data-frame size is programmable from 4 to 16 bits. The SPI interface also supports internal loop-back test mode.
PTM Published on: 2011-11-02