This circuit diagram shows how a typical RF detector is wired up. Silicon-based RF detectors typically have input impedances that vary with frequency from a few hundred ohms to a few kilo-ohms. While reactive matching is an option, it is generally recommended to go with a lossy external resistive match. In this case, a 60.4 ohm external shunt resistor combines with the internal resistance of around 2 kilo-ohms to yield a broadband 50ohm match. The temperature stability of some Analog Devices detectors can be fine-tuned. In this case, a fraction of the 2.3V on-chip reference voltage is fed to the TADJ pin using a resistor divider.  Since the temperature drift of an RF detector generally varies with frequency, different compensating voltages may be recommended for different input signal frequencies. Some averaging of the RF detector’s output voltage is generally necessary. This averaging happens at the CLPF pin. Larger values of capacitance on this pin filter away more residual ripple but this comes at a cost of a slower response time. The RF detector’s output voltage can generally be scaled upwards using the Vout and Vset  pins. In the above example, Vout and Vset are shorted together resulting in the nominal detector slope of 50 millivolts-per-dB. However, by connecting a simple resistor divider between Vout and Vset, this slope can be increased.