Slide 1 Slide 2 Slide 3 Slide 4 Slide 5 Slide 6 Slide 7 Slide 8 Slide 9 Slide 10 Slide 11 Slide 12 Slide 13 Slide 14 Slide 15 Slide 16 Slide 17 Slide 18 Slide 19 Slide 20 Slide 21 Slide 22 Product List
Slide17

This figure illustrates a circuit that implements DVS. The 3.3-V system power supply on the ADZS-BF533 EZLITE Lite® evaluation board powers the ADP2102 buck converter, whose output voltage is set to 1.2V using the external resistive dividers R1 and R2. A GPIO pin from the DSP is used to select a requested core voltage. Varying the feedback resistor adjusts the core voltage from 1.2V to 1.0V. An N-channel MOSFET modifies the voltage divider by inserting resistor R3 in parallel with R2. Feedforward capacitor CFF is needed for better transient performance and improved load regulation.

PTM Published on: 2008-04-16