The DMAC also supports Repeat Transfer Mode. As with normal mode, the DMAC transfers a single data item each time the DMAC is triggered. During each transfer, a single 8-, 16-, or 32-bit data item is transferred from the source address to the destination address. Each time the DMAC is triggered, a data item is transferred from source to destination. The source & destination address registers keep track of where to move the data from and to. As with normal mode, the DMAC can be configured to automatically increment or decrement one or both addresses.  The source or the destination can be specified as the repeat area, and the size of the repeat area can be up to 1K. In this example, the source will be used as the repeat area and a repeat area size of 4. At each trigger of the DMAC, a data item is transferred and the transfer count is decremented. A separate block count is decremented each time the end of the repeat area is reached. The block count can be a maximum of 1K. At this time, the address register for the repeat area is reset to its initial value. Since the source area is the repeat area in our example, the SAR register is reset to point to the start. The other address register continues to be updated; incrementing, decrementing or remaining constant according to its configuration. Further triggers of the DMAC continue to transfer data, one item at a time. The repeat area is reset at the end of each scan, and the block counter is decremented. When the block counter reaches zero, the transfer ends and an interrupt can be generated to the CPU. An interrupt may also be generated at each repeat, although users will need to be aware that this suspends the DMA transfers for this channel and it will need to be re-armed.