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Before entering Deep Sleep, firmware will configure RA0 as an output pin and drive it high to VDD. The I/O pin will charge the capacitor to VDD voltage. Once the capacitor is charged, firmware will let the ULPWU module take control of the RA0 pin and Deep Sleep mode is entered. During Deep Sleep, the ULPWU module will provide a small pull-down current to the pin, allowing the capacitor to slowly discharge over time. When the voltage of the capacitor finally drops to the I/O pin’s trip point (0.5 V), the device will wake up from Deep Sleep.
PTM Published on: 2011-10-28
Hong Kong, China