In the slower SAR ADCs below 1Msps, such as the LTC2367, LTC2377, LTC2364, and LTC2376, a proprietary sampling architecture extends the acquisition time two to three times longer than competitive products. This extended acquisition time eases settling time requirements and enables pairing with slower, much lower power ADC drivers, thus dramatically reducing the overall power required by the solution. Since most of the power of the signal chain solution will be in the ADC driver, by allowing a two to three times reduction in the driver’s speed, Analog Devices can achieve almost two to three times reduction in the driver’s power dissipation. Coupled with the simple driver for pseudo-differential inputs, a 40% or more reduction in the overall power of the signal chain solution can be achieved with the LTC2367 and LTC2364 SAR ADCs.