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LM20K Family PowerWise Synchronous Buck Regulator Slide 23

When using synchronization, the switching frequency of the device will synchronize to the rising edge of the clock source driving the SYNC pin. The logic low level for the input clock source must be below 0.8V and the logic high level must exceed 2.0V to guarantee proper operation. The device will synchronize to frequencies from 500 kHz to 1.5 MHz. If the synchronization clock is removed or not present during startup, the oscillator of the device will run at approximately 410 kHz. When the SYNC pin is not used it should be connected to ground.

PTM Published on: 2011-11-02