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MAX V Overview Slide 17

Shown in the block diagram on this slide is how a MAX® V CPLD may be used to provide I/O expansion and decoding for an ASSP. In this application the MAX® V CPLD can be used to add extra GPIOs, interrupt sources, PWM outputs, chip select decode and/or flash key or serial-ID storage, analog light level input using LED, with I²C used to connect to GPIOs, interrupts, PWM, and light sensor. Additionally, the MAX® V CPLD is being used to generate additional chip select outputs from the DFI or EBI2 address lines.

PTM Published on: 2011-09-01