LPC82x 32-bit ARM Cortex M0 Microcontroller

Power control:

• Power consumption in active mode as low as 90 µA / MHz in low-current mode using the IRC as the clock source
• Integrated power management unit (PMU) to minimize power consumption
• Reduced power modes: sleep mode, deep-sleep mode, power-down mode, and deep power-down mode
• Wake-up from deep-sleep and power-down modes on activity on USART, SPI, and I²C peripherals
• Timer-controlled self-wake-up from deep power-down mode
• Power-on reset (POR)
• Brownout detection (BOD)

Timers:

• State-configurable timer (SCTimer / PWM) with input and output functions (including capture and match) for timing and PWM applications. Each SCTimer / PWM input is multiplexed to allow selecting from several input sources such as pins, ADC interrupt, or comparator output
• Four-channel multi-rate timer (MRT) for repetitive interrupt generation at up to four programmable, fixed rates
• Self-wake-up timer (WKT) clocked from either the IRC, a low-power, low-frequency internal oscillator, or an external clock input in the always-on power domain
• Windowed watchdog timer (WWDT)

Clock generation:

• 12 MHz internal RC oscillator trimmed to 1.5% accuracy that can optionally be used as a system clock
• Crystal oscillator with an operating range of 1 MHz to 25 MHz
• Programmable watchdog oscillator with a frequency range of 9.4 KHz to 2.3 MHz
• PLL allows CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. May be run from the system oscillator, the external clock input, or the internal RC oscillator
• Clock output function with divider that can reflect all internal clock sources
• Unique device serial number for identification
• Single power supply (1.8 V to 3.6 V)

Applications

• Sensor gateways
• Gaming controllers
• System tick timer
• Simple motor control
• Lighting
• Fire and security applications
• Industrial
• 8- and 16-bit applications
• Climate control
• Portables and wearables

Digital peripherals:

• High-speed GPIO interface connected to the ARM Cortex-M0+ I/O bus with up to 29 General-purpose I/O (GPIO) pins with configurable pull-up / pull-down resistors, programmable open-drain mode, input inverter, and digital filter. GPIO direction control supports independent set / clear / toggle of individual bits.
• High-current source output driver (20 mA) on four pins
• High-current sink driver (20 mA) on two true open-drain pins
• GPIO interrupt generation capability with boolean pattern-matching feature on eight GPIO inputs
• Switch matrix for flexible configuration of each I/O pin function
• CRC engine
• DMA with 18 channels and 9 trigger inputs

Analog peripherals:

• One 12-bit ADC with up to 12 input channels with multiple internal and external trigger inputs and with sample rates of up to 1.2 Msamples/s. The ADC supports two independent conversion sequences
• Comparator with four input pins and external or internal reference voltage

Serial peripherals:

• Three USART interfaces with pin functions assigned through the switch matrix and one common fractional baud rate generator
• Two SPI controllers with pin functions assigned through the switch matrix
• Four I²C-bus interfaces. One I²C supports fast-mode plus with 1 Mbit/s data rates on two true open-drain pins and listen-mode. Three I²Cs support data rates up to 400 kbit/s on standard digital pins.

ROM API support:

• Boot loader
• On-chip ROM APIs for ADC, SPI, I²C, USART, power configuration (power profiles), and integer divide
• Flash in-application programming (IAP) and in-system programming (ISP)
• Operating temperature range: -40°C to +105°C
• Available in a TSSOP20 and HVQFN33 (5 x 5) package