RISC-V Embraces AI and ML with a Dual-Core 64-bit Machine Vision/Hearing Development Board

RISC-V is the latest entry in a resurgence of innovation in 32-bit cores. But this time it’s a different engineering environment. Recent core innovations and competition focused on the established general-purpose microcontroller market, with generic peripherals focused on rugged automotive applications. However, today’s embedded landscape is focused on Internet of Things (IoT) endpoints targeting sophisticated industrial edge computing systems. Instead of just generic timers and serial interfaces, the latest RISC-V microcontrollers also support sophisticated peripherals including, artificial intelligence (AI) inference engines and machine learning (ML) capabilities.

However, RISC-V has additional advantages that go beyond the evolving market and technical demands. Before we get into those, let’s take a quick look at where we’ve come from.

A very short history of microcontroller innovation

The embedded microcontroller market sees a revolution every few years. These occur at irregular times and are driven not just by market needs for performance and features, but also by the business aspects of the industry. Beginning with the venerable 8051, the 8-bit marketplace dominated embedded systems in almost everything, including automotive, games, and appliances; to this day, the 8-bit ultra-low power microcontroller is still everywhere, and even the 8051 continues to generate impressive numbers (more on this later).

The 16-bit microcontroller has long inhabited the sweet spot between low power and performance, and to this day it remains a misunderstood marketplace to many suppliers outside of the established players. Then came 32-bit processors. These became significant outside of personal computers with a variety of proprietary architectures during the core wars of the 1990s and early 2000s.

Arm settled the 32-bit core wars. With its wide variety of suppliers all loosely united under a common architecture, customers were the winners by being able to easily change suppliers without having to put significant effort into porting their code, an advantage over proprietary architectures.

RISC-V truly reduces the instruction set

For the longest time, RISC-V was just below the noise level in terms of market share, mainly because there was no real perceived market need for a new 32-bit instruction set architecture (ISA). However, any engineer that looked at the core architecture of the RISC-V was immediately impressed.

RISC has historically meant Reduced Instruction Set Core/Computer which literally means it has only those minimal instructions needed to perform useful operations. Since those early days, most architectures now labeled RISC have strayed from that definition, with so many complex instructions that engineers now regard the label with some cynicism. But the RISC-V ISA stays so true to that definition we can almost hear James Earl Jones’ voice in our head clearly intoning, “Impressive. Most impressive.”

The basic 32-bit RISC-V has 32 32-bit core registers, x0 to x31. 31 of these are general-purpose, while register x0 is hard-wired to zero. As you delve deeper into the RISC-V instruction set, you can see the wisdom of x0 = 0 and why x0 is a necessary operand for many instructions that keep the reduced instruction set, well, reduced. But that is a story for another time.

The semiconductor industry is a global one with many healthy interdependencies, but now semiconductor suppliers, for reasons both obvious and subtle, want to maintain more control over their products, which includes taking a second look at costly licensing agreements and intellectual property (IP) sources that are being sold and resold. This makes RISC-V a customizable, open-source, and royalty-free ISA, the right architecture at the right time in history. So much so, that DigiKey is spotlighting RISC-V on its EDU site with a RISC-V eBook—the “Academic Components Reference Guide: RISC-V”—that introduces novice and experienced developers to RISC-V tools and evaluation kits. Using these tools, developers having no prior experience with the architecture can quickly become acquainted and familiar with the RISC-V programming model and ISA.

RISC-V: Powerful core for AI/ML

While it’s usually the case that a new ISA will introduce itself to the marketplace with general-purpose microcontrollers, complete with an evaluation board with pretty blinking LEDs, RISC-V is going directly to AI and ML. Seeed Technology, for example, is enabling ML with the Seeed 110991190 Sipeed Maix-BiT development board based on the RISC-V RV64I, a 64-bit address and data ISA with 64-bit core registers x0 to x31 (Figure 1).

Figure 1: The Seeed Technology Sipeed Maix-BiT development board is based on a dual-core RISC-V RV64GC and targets machine vision and machine learning applications. (Image source: Seeed Technology)

As discussed in DigiKey’s RISC-V eBook (starting on Page 5), this board’s small size and high performance make it suitable for edge processing IoT applications.

The core processor for the Sipeed Maix-BiT board is a dual-core RV64GC microcontroller system-on-chip (SoC), where the G-suffix specifies support for general purpose extensions of hardware multiply and division, atomic read-modify-write memory instructions, and support for both single and double-precision floating-point. The C-suffix indicates the microcontroller supports 16-bit compressed instructions, useful for writing compact code. The microcontroller can access 6 mebibytes (MiB) of general-purpose on-chip SRAM, in addition to 128 megabits (Mbits) of external program flash memory. This is impressive processing power for a relatively new ISA and enough memory for complex edge computing applications.

What makes the dual-core RV64GC microcontroller most impressive is an on-chip general-purpose AI neural network processor that is designed to detect faces and objects in real-time. The AI processor has 2 MiB of dedicated SRAM for performing AI operations. This provides an impressive amount of processing power accessible to anyone with moderate microcontroller programming skills.

The Sipeed Maix-BiT board includes a micro SD card slot for flash memory expansion. An on-board microelectromechanical system (MEMS) microphone can be used with the AI unit for machine hearing applications, including complex voice and noise recognition systems. The kit also includes an external camera that plugs into a Digital Video Port (DVP) camera connector on the underside of the board. This facilitates complex machine vision applications, an advantage in IoT edge processing systems.

The board also has a USB-C interface for programming and debugging, which interfaces to the dual-core RV64GC with a USB-to-UART chip. There is an additional connector for the included external LCD display. This allows for visual feedback during program development and can also be used in the application for user feedback.

Conclusion

It’s been a long journey from the days of the 8-bit microcontroller. Will the RISC-V ISA take its place alongside Arm in a marketplace of healthy competition? With all the interest in RISC-V and advanced development boards like the one discussed here, it seems certain RISC-V has enough momentum to carry it into the marketplace, but that’s a larger discussion. Right now, with offerings like Seeed’s 110991190 Sipeed Maix-BiT, it seems certain to make headway in IoT and AI/ML applications at the edge.

Oh, one more thing. To underscore the ubiquity of 8-bitters, both the LCD interface IC and the CH552 USB-to-UART IC on the development board are preprogrammed 8-bit microcontrollers. And the CH552 is actually a venerable 8051.