Si533xx Low-Jitter, Fixed-Format Clock Buffers

Silicon Labs offers its low-jitter, LVCMOS, LVPECL, and LVDS fanout clock buffers with up to 10- or 12-outputs and frequency range from DC to 200 MHz or 1250 MHz

Image of Silicon Laboratories' Si533xx Low-Jitter Fixed-Format Clock BuffersSilicon Labs is significantly expanding the number of fixed-format LVPECL, LVDS, and LVCMOS clock buffers. The fixed-format buffers are recommended for clock distribution applications that need simple fanout buffers and users who are not willing to pay a premium for advanced features, such as clock output format selection and clock division. These buffers deliver more clock outputs and lower jitter than Silicon Labs’ legacy Si5330 fixed-format buffer family. These fixed-format buffers can be matched with Silicon Labs’ high performance clocks like Si5338/35/4x/8x and Si5xx XO/VCXOs, providing competitive clock tree solutions for any application.

Features Applications
  • Low additive jitter: 120 fs RMS 
  • Built-in LDOs for high PSRR performance 
  • Up to 12 LVCMOS outputs from LVCMOS inputs 
  • Frequency range: DC to 200 MHz 
  • Multiple configuration options 
  • Dual bank option
  • 2:1 input MUX option 
  • Communications - gigabit Ethernet
  • Data center - PCIe Bus
  • Wireless infrastructure
  • Audio/video
  • Industrial

Evaluation Board

ImageManufacturer Part NumberDescriptionFunctionUtilized IC / PartContentsAvailable QuantityPriceView Details
EVAL BOARD FOR SI53300SI53301/4-EVBEVAL BOARD FOR SI53300Clock BufferSi53300Board(s)7 - Immediate$1,206.93View Details
Published: 2017-02-14