BLAZAR BE2-BURST/BE3-BURST Accelerator Engines
Peraso BLAZAR BE2 and BE3 accelerator engines with intelligent in-memory BURST transfer functions
Peraso's BLAZAR family of accelerator engines support high bandwidth, fast random memory access rates, and embedded in-memory functions (IMF) that solve critical memory access challenges for memory bottlenecked applications like network search, statistics, buffering, security, firewall, 8k video, anomaly detect, genomics, ML random forest of trees, graph/tree/list walking, and traffic monitoring.
The Bandwidth Engine 2 BURST (BE2-BURST) combines 576 Mb of high-speed serial memory with in-memory bandwidth functions while the Bandwidth Engine 3 BURST (BE3-BURST) offers up to 1.152 Gb. IMF reduce the number of memory commands, such as BURST, that support single memory commands for 2, 4, or 8 sequential read and write for data movement and reduced memory command cycles. The Bandwidth Engine BURST is ideal for any system that can use large SRAM capacity to increase performance as well as QDR replacement to achieve higher performance with simpler design effort. Support for bandwidth of up to 320 Gbps for BE2 and 380 Gbps for BE3 with a 640 Gbps version available.
Diagram
Resources
- 576 Mb (BE2) and 1.152 Gb (BE3) of high speed 1 T storage:
- Replaces 4 QDR devices (BE2) and 8 QDR devices (BE3)
- High access rate SRAM class memory
- High cycle rate memory
- Up to 6.5 billion transactions/sec
- 3.2 ns tRC
- 4 partitions/64 banks (up to 128 with BE3) and supports simultaneous access
- Peraso provided RTL memory controller allows user to define memory word length
- Such as x8, x16, x32, x36, x64, x72
- In-memory bandwidth functions:
- BURST sequential read and write functions for data movement nearly doubles bandwidth
- Burst length: 1, 2, 4, 8 words
- Using the IMF, outperforms a QDR
- 8 reads and 8 writes that can be executed simultaneously with the BE2 and up to 16 reads/writes with the BE3
- Package:
- The BE2 BURST in 19 mm x 19 mm
- The BE3 BURST in 27 mm x 27 mm
- Two 8 lane, independent interface ports:
- Each port is independent, allowing for dual-port operation
- High bandwidth, low pin count serial interface
- Uses only 32 pins to FPGA or ASIC (can be as few as 8 pins)
- Reduction of I/O pins up to 7X over QDR
- Onboard signal auto-adaption eases board layout and signal integrity
- Minimal trace length matching required and operates over connectors
- SerDes rate of 12.5 Gbps for the BE2 and 15.6 Gbps for the BE3 (25 Gbps available for higher bandwidth)
- Up to 3.3 B transactions per second on the I/O pins and 6.5 B for the BE3
- Performance:
- Single-chip bandwidth
- 320 Gbps throughput for the BE2
- 380 Gbps (version available for 640 Gbps) for the BE3
- Using IMF outperforms a QDR by:
- Eliminates a significant number of system memory commands
- Memory cycle Time Saved increases application performance
- Network search
- Statistics
- Buffering
- Security
- Firewall
- 8k video
- Anomaly detection
- Genomics
- ML random forest of trees
- Graph/tree/list walking
- Traffic monitoring
BLAZAR BE2/BE3 Accelerator Engines
Image | Manufacturer Part Number | Description | Memory Organization | Voltage - Supply | Supplier Device Package | Available Quantity | Price | View Details | |
---|---|---|---|---|---|---|---|---|---|
![]() | ![]() | MSR622AJC288-12 | IC SRAM 576MBIT PAR 324PBGA | 8M x 72 | 0.95V | 324-PBGA (19x19) | 24 - Immediate | $3,108.44 | View Details |
![]() | ![]() | MSR630AGC-1512 | IC SRAM 1GBIT PAR 676BGA | 16M x 72 | 2.7 ns | 676-BGA | 0 - Immediate | $4,660.81 | View Details |