GroupGets

LoFive RISC-V SoC Evaluation Kit

The LoFive board from GroupGets features the SiFive Freedom E310 (FE310) 32-bit RV32IMAC processor

Image of GroupGets'LoFive RISC-V SoC Evaluation Kit LoFive is a lightweight SiFive Freedom E310 open source system-on-chip (SoC) evaluation kit from GroupGets. The E310 leverages the free and open RISC-V instruction set architecture originally developed by UC Berkeley and now has wide industry support via the RISC-V Foundation.

Features
  • SiFive E31 core complex up to 320 MHz
  • Flexible clocking options including internal PLL, free-running ring oscillator, and external 16 MHz crystal
  • 1.61 DMIPs/MHz, 2.73 CoreMark®/MHz
  • RV32IMAC
  • 8 kB OTP program memory
  • 8 kB mask ROM
  • 16 kB instruction cache
  • 16 kB data SRAM
  • Three independent PWM controllers
  • External RESET pin
  • JTAG, SPI, I²C, and UART interfaces
  • QSPI Flash interface
  • Requires 1.8 V and 3.3 V supplies
  • Hardware multiply and divide

LoFive RISC-V SoC Evaluation Kit

ImageManufacturer Part NumberDescriptionCore ProcessorPlatformContentsAvailable QuantityPriceView Details
SIFIVE FE310-G002 RISC-V DEVLOFIVE-R1SIFIVE FE310-G002 RISC-V DEVRISC-VLoFive R1Board(s)0 - Immediate$246.88View Details
Published: 2019-08-08

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Introduction to RISC V A quick introduction to, and overview of the open-source RISC-V architecture.
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