TE STRADA Whisper Connector Backplane and Daughter Cards

TE's STRADA Whisper backplane connector is designed to support data rates per differential pair up to 56Gbps. The connector's individually shielded pairs results in noise performance that is less than 1% at 20 PS signal edge rates and insertion loss of less than 1db and flat past 15GHz. STRADA Whisper connectors are available in both 100 ohm and 85 ohm versions and can be supplied with embedded capacitors. The in-row "horizontal" pair orientation results in zero skew. Since PCB interfaces are a critical element of overall connector performance, the STRADA Whisper connector footprint has been engineered to optimize the technical tradeoffs of impedance, cross talk and route-ability.

The TE Connectivity channel is built with Megatron 6 material and implements TE's STRADA Whisper backplane connector product. The goal of the demonstration is to exhibit the OIF CEI-25G-LR Implementation Agreement (IA) with 4-lane 100G operation across a backplane link with end-to end loss of >25 dB at 12.9GHz. Each lane carries a PRBS31 pattern running at a 25.78125 Gb/s data rate. PRBS generation and checking is performed on-chip. The demonstration includes a Xilinx FPGA interoperating with the Semtech backplane re-timer over a TE Connectivity-supplied reference backplane. The 30-inch backplane channel and two 5-inch line cards, which are used in this demonstration, contain approximately 27dB of loss from the 2.4mm connector on one daughter card to the 2.4mm connector on the other daughter card. Several dB of additional loss takes place on the Xilinx and Semtech evaluation cards and coaxial interconnect so that total channel loss exceeds 30 dB. The demonstration runs 4 lanes of bidirectional traffic at 25.78Gbps resulting in 4 NEXT (near end crosstalk) lanes, and 3 FEXT (far end crosstalk) lanes, acting on victim pairs in order to increase the amount of crosstalk.