(ifineon
Chip Card & Security ICs
SLE 5542
Intelligent 256-Byte EEPROM
with Write Protection function
and Programmable Security Code
Short Product Information May 2006
SLE 5542 Short Product Information Ref.: SPI_SLE5542_0506.doc
Revision History: Current Version 2006-05-19
Previous Releases: 2005-06-16
Page Subjects (changes since last revision)
all Editorial changes
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Chip Card & Security ICs,
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© Infineon Technologies AG 2006
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(Infineon
SLE 5542
Short Product Information 3 / 6 2006-05-19
Intelligent 256-Byte EEPROM
with Write Protection Function
and Programmable Security Code (PSC)
Features
• 100% functional compatibility to SLE 4442
• 256 x 8 bit EEPROM organization of Data Memory
• 32 x 1 bit Protection Memory
– Byte-wise write protection of first 32 addresses (byte 0...31) of Data Memory
– Manufacturer Code for unique identification of application
• Data Memory (addresses 0…255) alterable only after verification of 3-Byte
Programmable Security Code (PSC)
• Two-wire link protocol
– Byte-wise addressing
– End of processing indicated at data output
• Contact configuration and Answer-to-Reset (synchronous transmission) in accordance
to standard ISO/IEC 7816
• Sophisticated electrical characteristics
– Ambient temperature –40 … +80°C for chip, –25 … +80°C for module
– Supply voltage 5 V ± 10 %
– Supply current < 3 mA (typical 600 µA)
– EEPROM erase / write time 5 ms
– ESD protection typical 4,000 V
– EEPROM Endurance minimum 100,000 erase / write cycles1)
– Data retention for minimum of 10 years1)
• Advanced 1.2 µm CMOS-technology optimised for security layout
– EEPROM-cells protected by shield
– Shielding of deeper layers via metal
– Sensory and logical security functions
– No isolation on backside necessary
1) Values are temperature dependent.
M3
(Infirneon
VCC GND
RST N C
CLK U0
VCC GND
RST N.C.
CLK l/‘O
SLE 5542
Short Product Information 4 / 6 2006-05-19
1 Ordering and Packaging information
Table 1 Ordering Information
Type Package1) Remark Ordering Code
SLE 5542 C Die (on Wafer) unsawn on request
SLE 5542 D Die (on Wafer) sawn on request
SLE 5542 M3 T-M3.2-6 on request
SLE 5542 MFC3 S-MFC3.1-6-1 FCoS™ on request
Pin Description
Figure 1 Pin Configuration Wire-bonded Module M3.2 (top view)
Figure 2 Pin Configuration Module Flip Chip MFC3.1 (top view)
1) Available as a Module Flip Chip (MFC3), wire-bonded module (M3) for embedding in plastic cards or as a die on
unsawn (C) / sawn wafer (D) for customer packaging
@neon
SLE 5542
Short Product Information 5 / 6 2006-05-19
SLE 5542
GND
I/O
VCC
RST
CLK
Figure 3 Pad Configuration Die
Table 2 Pin Definitions and Functions
Card Contact Symbol Function
C1 VCC Supply voltage
C2 RST Control input (Reset Signal)
C3 CLK Clock input
C5 GND Ground
C6 N.C. Not connected
C7 I/O Bi-directional data line (open drain)
Infiineon
Memory Oganization
Write Protection of Data Memory
Programmable Security Code
a E
Itn
IO
Security Logic Protection Data
Memory Memory
(PROM) (EEPROM)
Programmable
Security Code
Error Counter
Read Main Memory
Update Main Memory
Aherable Data
224 byte
- IIO
Command Logic
Updale Main Memory
32 byte
‘ Read Main Memory
Proteclable Data
SLE 5542
Short Product Information 6 / 6 2006-05-19
2 Circuit Description
Memory Organization
The memory is organized in a Data Memory of 256 byte.
Write Protection of Data Memory
Each of the first 32 bytes of the Data Memory can be irreversibly protected against data change by
writing the corresponding bit in the Protection Memory (32 bit). Dependent on the state of the
protection bit the Data Memory is read only (ROM) or may be erased and written again
(EEPROM). Change of the manufacturer code (Application ID and Chip Coding) is only possible by
the chip manufacturer.
Programmable Security Code
Change of data of the Data Memory and write a bit of the Protection Memory is only possible after
verification of the 3-Byte Programmable Security Code (PSC).
Figure 4 Memory Overview SLE 5542
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