0N Semiconductor®
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aaa
0099
© Semiconductor Components Industries, LLC, 2015
June, 2019 − Rev. 23
1Publication Order Number:
MC74VHC1G08/D
MC74VHC1G08,
MC74VHC1GT08
Single 2-Input AND Gate
The MC74VHC1G08 / MC74VHC1GT08 is a single 2 input AND
gate in tiny footprint packages. The MC74VHC1G08 has
CMOS−level input thresholds while the MC74VHC1GT08 has
TTL−level input thresholds.
The input structures provide protection when voltages up to 5.5 V
are applied, regardless of the supply voltage. This allows the device to
be used to interface 5 V circuits to 3 V circuits. The output structures
also provide protection when VCC = 0 V and when the output voltage
exceeds VCC. These input and output structures help prevent device
destruction caused by supply voltage − input/output voltage mismatch,
battery backup, hot insertion, etc.
Features
•Designed for 2.0 V to 5.5 V VCC Operation
•3.5 ns tPD at 5 V (typ)
•Inputs/Outputs Over−Voltage Tolerant up to 5.5 V
•IOFF Supports Partial Power Down Protection
•Source/Sink 8 mA at 3.0 V
•Available in SC−88A, SC−74A, TSOP−5, SOT−553, SOT−953 and
UDFN6 Packages
•Chip Complexity < 100 FETs
•NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Figure 1. Logic Symbol
IN A
IN B OUT Y
&
See detailed ordering, marking and shipping information in the
package dimensions section on page 7 of this data sheet.
ORDERING INFORMATION
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SC−88A
DF SUFFIX
CASE 419A
SOT−553
XV5 SUFFIX
CASE 463B
XX MG
G
XX = Specific Device Code
M = Date Code*
G= Pb−Free Package
XX MG
G
1
5
XX MG
G
TSOP−5
DT SUFFIX
CASE 483
1
5
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.
UDFN6
1.0 x 1.0
CASE 517BX
X M
1
SOT−953
P5 SUFFIX
CASE 527AE
X M
1
XXX MG
G
SC−74A
DBV SUFFIX
CASE 318BQ
XM
UDFN6
1.45 x 1.0
CASE 517AQ
1
MARKING
DIAGRAMS
MC74VHC1G08, MC74VHC1GT08
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2
Figure 2. Pinout (Top View)
(SC−88A/SOT−553/
TSOP−5/ SC−74A)
SOT−953
VCC
B
A
YGND
1
2
3
5
4
6
NC
UDFN6
VCC
B
A
Y
GND
1
2
34
5
VCC
B
GND
Y
A
1
2
34
5
PIN ASSIGNMENT
(SC−88A/SOT−553/ TSOP−5/SC−74A)
Pin
1
2
3
4
5
Function
B
A
GND
Y
VCC
Input
FUNCTION TABLE
B
L
H
L
Output
Y
L
L
L
A
L
L
H
PIN ASSIGNMENT (SOT−953)
Pin
1
2
3
4
5
Function
A
GND
B
Y
VCC
PIN ASSIGNMENT (UDFN)
Pin
1
2
3
4
5
Function
B
A
GND
Y
NC
6V
CC
HHH
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MAXIMUM RATINGS
Symbol Characteristics Value Unit
VCC DC Supply Voltage TSOP−5, SC−88A (NLV)
SC−74A, SC−88A, UDFN6, SOT−553, SOT−953
−0.5 to +7.0
−0.5 to +6.5
V
VIN DC Input Voltage TSOP−5, SC−88A (NLV)
SC−74A, SC−88A, UDFN6, SOT−553, SOT−953
−0.5 to +7.0
−0.5 to +6.5
V
VOUT DC Output Voltage Active−Mode (High or Low State)
TSOP−5, SC−88A (NLV) Tri−State Mode (Note 1)
Power−Down Mode (VCC = 0 V)
−0.5 to VCC + 0.5
−0.5 to +7.0
−0.5 to +7.0
V
DC Output Voltage Active−Mode (High or Low State)
SC−74A, SC−88A, UDFN6, SOT−553, SOT−953 Tri−State Mode (Note 1)
Power−Down Mode (VCC = 0 V)
−0.5 to VCC + 0.5
−0.5 to +6.5
−0.5 to +6.5
V
IIK DC Input Diode Current VIN < GND −20 mA
IOK DC Output Diode Current VOUT < GND ±20 mA
IOUT DC Output Source/Sink Current ±12.5 mA
ICC or IGND DC Supply Current per Supply Pin or Ground Pin ±25 mA
TSTG Storage Temperature Range −65 to +150 °C
TLLead Temperature, 1 mm from Case for 10 secs 260 °C
TJJunction Temperature Under Bias +150 °C
qJA Thermal Resistance (Note 2) SC−88A
SC−74A
TSOP−5
SOT−553
SOT−953
UDFN6
659
555
555
562
560
382
°C/W
PDPower Dissipation in Still Air SC−88A
SC−74A
TSOP−5
SOT−553
SOT−953
UDFN6
190
225
225
222
223
327
mW
MSL Moisture Sensitivity Level 1 −
FRFlammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in −
VESD ESD Withstand Voltage (Note 3) Human Body Model
Charged Device Model
2000
1000
V
ILatchup Latchup Performance (Note 4) $100 mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Applicable to devices with outputs that may be tri−stated.
2. Measured with minimum pad spacing on an FR4 board, using 10mm−by−1inch, 2 ounce copper trace no air flow.
3. HBM tested to ANSI/ESDA/JEDEC JS−001−2017. CDM tested to EIA/JESD22−C101−F. JEDEC recommends that ESD qualification to
EIA/JESD22−A115−A (Machine Model) be discontinued per JEDEC/JEP172A.
4. Tested to EIA/JESD78 Class II.
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4
RECOMMENDED OPERATING CONDITIONS
Symbol Characteristics Min Max Unit
VCC Positive DC Supply Voltage 2.0 5.5 V
VIN DC Input Voltage 0 5.5 V
VOUT DC Output Voltage TSOP−5, SC−88A (NLV) 0 VCC V
DC Output Voltage SC−74A, SC−88A, UDFN6, SOT−553, SOT−953
Active−Mode (High or Low State)
Tri−State Mode (Note 1)
Power−Down Mode (VCC = 0 V)
0
0
0
VCC
5.5
5.5
TAOperating Temperature Range −55 +125 °C
tr , tfInput Rise and Fall Time TSOP−5, SC−88A (NLV)
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
0
0
100
20
ns/V
Input Rise and Fall Time SC−74A, SC−88A, UDFN6, SOT−553, SOT−953
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
0
0
0
0
20
20
10
5
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS (MC74VHC1G08)
Symbol Parameter
Test
Conditions
VCC
(V)
TA = 25°C−40°C ≤ TA ≤ 85°C−55°C ≤ TA ≤ 125°C
Unit
Min Typ Max Min Max Min Max
VIH High−Level Input
Voltage
2.0 1.5 − − 1.5 −1.5 −V
3.0 2.1 − − 2.1 −2.1 −
4.5 3.15 − − 3.15 −3.15 −
5.5 3.85 − − 3.85 −3.85 −
VIL Low−Level Input
Voltage
2.0 − − 0.5 −0.5 −0.5 V
3.0 − − 0.9 −0.9 −0.9
4.5 − − 1.35 −1.35 −1.35
5.5 − − 1.65 −1.65 −1.65
VOH High−Level Output
Voltage
VIN = VIH or VIL
IOH = −50 mA
IOH = −50 mA
IOH = −50 mA
IOH = −4 mA
IOH = −8 mA
2.0
3.0
4.5
3.0
4.5
1.9
2.9
4.4
2.58
3.94
2.0
3.0
4.5
−
−
−
−
−
−
−
1.9
2.9
4.4
2.48
3.80
−
−
−
−
−
1.9
2.9
4.4
2.34
3.66
−
−
−
−
−
V
VOL Low−Level Output
Voltage
VIN = VIH or VIL
IOL = 50 mA
IOL = 50 mA
IOL = 50 mA
IOL = 4 mA
IOL = 8 mA
2.0
3.0
4.5
3.0
4.5
−
−
−
−
−
0.0
0.0
0.0
−
−
0.1
0.1
0.1
0.36
0.36
−
−
−
−
−
0.1
0.1
0.1
0.44
0.44
−
−
−
−
−
0.1
0.1
0.1
0.52
0.52
V
IIN Input Leakage
Current
VIN = 5.5 V or
GND
2.0 to
5.5
− − ±0.1 −±1.0 −$1.0 mA
IOFF Power Off Leakage
Current
VIN = 5.5 V or
VOUT = 5.5 V
0− − 1.0 −10 −10 mA
ICC Quiescent Supply
Current
VIN = VCC or
GND
5.5 − − 1.0 −20 −40 mA
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DC ELECTRICAL CHARACTERISTICS (MC74VHC1GT08)
Symbol Parameter
Test
Conditions
VCC
(V)
TA = 25°C−40°C ≤ TA ≤ 85°C−55°C ≤ TA ≤ 125°C
Unit
Min Typ Max Min Max Min Max
VIH High−Level Input
Voltage
2.0 1.0 − − 1.0 −1.0 −V
3.0 1.4 − − 1.4 −1.4 −
4.5 2.0 − − 2.0 −2.0 −
5.5 2.0 − − 2.0 −2.0 −
VIL Low−Level Input
Voltage
2.0 − − 0.28 −0.28 −0.28 V
3.0 − − 0.45 −0.45 −0.45
4.5 − − 0.8 −0.8 −0.8
5.5 − − 0.8 −0.8 −0.8
VOH High−Level Output
Voltage
VIN = VIH or VIL
IOH = −50 mA
IOH = −50 mA
IOH = −50 mA
IOH = −4 mA
IOH = −8 mA
2.0
3.0
4.5
3.0
4.5
1.9
2.9
4.4
2.58
3.94
2.0
3.0
4.5
−
−
−
−
−
−
−
1.9
2.9
4.4
2.48
3.80
−
−
−
−
−
1.9
2.9
4.4
2.34
3.66
−
−
−
−
−
V
VOL Low−Level Output
Voltage
VIN = VIH or VIL
IOL = 50 mA
IOL = 50 mA
IOL = 50 mA
IOL = 4 mA
IOL = 8 mA
2.0
3.0
4.5
3.0
4.5
−
−
−
−
−
0.0
0.0
0.0
−
−
0.1
0.1
0.1
0.36
0.36
−
−
−
−
−
0.1
0.1
0.1
0.44
0.44
−
−
−
−
−
0.1
0.1
0.1
0.52
0.52
V
IIN Input Leakage
Current
VIN = 5.5 V or
GND
1.65
to 5.5
− − ±0.1 −±1.0 −$1.0 mA
IOFF Power Off Leakage
Current
VIN = 5.5 V or
VOUT = 5.5 V
0− − 1.0 −10 −10 mA
ICC Quiescent Supply
Current
VIN = VCC or
GND
5.5 − − 1.0 −20 −40 mA
ICCT Increase in Quies-
cent Supply Current
per Input Pin
One Input: VIN
= 3.4 V; Other
Input at VCC or
GND
5.5 − − 1.35 −1.5 −1.65 mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns)
Symbol Parameter Conditions VCC (V)
TA = 25°C−40°C ≤ TA ≤ 85°C−55°C ≤ TA ≤ 125°C
Unit
Min Typ Max Min Max Min Max
tPLH,
tPHL
Propagation Delay,
A to Y
(Figures 3 and 4)
CL = 15 pF 3.0 to 3.6 −4.1 8.8 −10.5 −12.5 ns
CL = 50 pF −5.9 12.3 −14.0 −16.5
CL = 15 pF 4.5 to 5.5 −3.5 5.9 −7.0 −9.0
CL = 50 pF −4.2 7.9 −9.0 −11.0
CIN Input Capacitance −4.0 10 −10 −10 pF
COUT Output Capacitance Output in
High
Impedance
State
−6.0 − − − − − pF
CPD Power Dissipation Capacitance (Note 5)
Typical @ 25°C, VCC = 5.0 V
pF
8.0
5. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
DUT
? I
cL mcludes probe and pg capamla
RT Is 20m of pulse generator uyp.
f: 1 MHz
Figure a. Test Circu
MC74VHC1G08, MC74VHC1GT08
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6
Figure 3. Test Circuit
CL includes probe and jig capacitance
RT is ZOUT of pulse generator (typically 50 W)
f = 1 MHz
CL*
RL
OUTPUT
RT
VCC
DUT
GND
OPEN Test Switch
Position
CL, pF RL, W
tPLH / tPHL Open See AC Characteristics Table X
tPLZ / tPZL VCC 1 k
tPHZ / tPZH GND 1 k
X = Don’t Care
tr = 3 ns
tPZH tPHZ
tPZL tPLZ
Vmo
Vmo
Vmi
Figure 4. Switching Waveforms
90%
10%
90%
10%
INPUT
OUTPUT
OUTPUT
~0 V
INPUT
OUTPUT
OUTPUT
tf = 3 ns
VCC
GND
VOH
VOL
VOH
VOL
Vmo
Vmo
Vmi
tPHL tPLH
tPLH tPHL
Vmo
Vmo
Vmi Vmi
VCC
GND
VOL
VOH
VOH − VY
VOL + VY
~VCC
VCC, V Vmi, V
Vmo, V
VY
, V
tPLH, tPHL tPZL, tPLZ, tPZH, tPHZ
3.0 to 3.6 VCC/2 (VOH − VOL)/2 VCC/2 0.3
4.5 to 5.5 VCC/2 (VOH − VOL)/2 VCC/2 0.3
Direction of Feed
O O O
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ORDERING INFORMATION
Device Packages Specific Device Code
Pin 1 Orientation
(See below) Shipping†
MC74VHC1G08DFT1G SC−88A V2 Q2 3000 / Tape & Reel
MC74VHC1G08DFT2G SC−88A V2 Q4 3000 / Tape & Reel
NLVVHC1G08DFT1G* SC−88A V2 Q2 3000 / Tape & Reel
NLVVHC1G08DFT2G* SC−88A V2 Q4 3000 / Tape & Reel
M74VHC1GT08DFT1G SC−88A VT Q2 3000 / Tape & Reel
M74VHC1GT08DFT2G SC−88A VT Q4 3000 / Tape & Reel
NLVVHC1GT08DFT1G* SC−88A VT Q2 3000 / Tape & Reel
NLVVHC1GT08DFT2G* SC−88A VT Q4 3000 / Tape & Reel
MC74VHC1G08DBVT1G SC−74A V2 Q4 3000 / Tape & Reel
MC74VHC1GT08DBVT1G SC−74A V2 Q4 3000 / Tape & Reel
MC74VHC1G08DTT1G TSOP−5 V2 Q4 3000 / Tape & Reel
M74VHC1GT08DTT1G TSOP−5 VT Q4 3000 / Tape & Reel
NLV74VHC1G08DTT1G* TSOP−5 V2R Q4 3000 / Tape & Reel
NLVVHC1GT08DTT1G* TSOP−5 VT Q4 3000 / Tape & Reel
MC74VHC1G08XV5T2G
(In Development)
SOT−553 TBD Q4 3000 / Tape & Reel
MC74VHC1GT08XV5T2G
(In Development)
SOT−553 TBD Q4 3000 / Tape & Reel
MC74VHC1G08P5T5G SOT−953 E Q2 4000 / Tape & Reel
MC74VHC1GT08P5T5G SOT−953 E Q2 4000 / Tape & Reel
MC74VHC1G08MU1TCG
(In Development)
UDFN6, 1.45 x 1.0, 0.5P TBD Q4 3000 / Tape & Reel
MC74VHC1GT08MU1TCG
(In Development)
UDFN6, 1.45 x 1.0, 0.5P TBD Q4 3000 / Tape & Reel
MC74VHC1G08MU3TCG
(In Development)
UDFN6, 1.0 x 1.0, 0.35 TBD Q4 3000 / Tape & Reel
MC74VHC1GT08MU3TCG
(In Development)
UDFN6, 1.0 x 1.0, 0.35 TBD Q4 3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
Pin 1 Orientation in Tape and Reel
i—Te
MC74VHC1G08, MC74VHC1GT08
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8
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
DIM
A
MIN MAX MIN MAX
MILLIMETERS
1.80 2.200.071 0.087
INCHES
B1.15 1.350.045 0.053
C0.80 1.100.031 0.043
D0.10 0.300.004 0.012
G0.65 BSC0.026 BSC
H--- 0.10---0.004
J0.10 0.250.004 0.010
K0.10 0.300.004 0.012
N0.20 REF0.008 REF
S2.00 2.200.079 0.087
B0.2 (0.008) MM
12 3
45
A
G
S
D 5 PL
H
C
N
J
K
−B−
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE L
ǒmm
inchesǓ
SCALE 20:1
0.65
0.025
0.65
0.025
0.50
0.0197
0.40
0.0157
1.9
0.0748
SOLDER FOOTPRINT*
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
%
MD
TOP VIEW
A
@i i u
m T “
SIDE VIEW
Wl-III
52mg; mi'fi
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PACKAGE DIMENSIONS
SC−74A
CASE 318BQ
ISSUE B
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE.
DIM MIN MAX
MILLIMETERS
D
E1
A0.90 1.10
b0.25 0.50
e0.95 BSC
A1 0.01 0.10
c0.10 0.26
L0.20 0.60
M0 10
E2.50 3.00
123
54
E
D
E1
b
A
c
__
0.20
5X
CAB
CSEATING
PLANE
L
M
DETAIL A
TOP VIEW
SIDE VIEW
A
B
END VIEW
1.35 1.65
2.85 3.15
2.40
0.70
5X
DIMENSIONS: MILLIMETERS
RECOMMENDED
0.95
PITCH
1.00
5X
e
A1
0.05
DETAIL A
\wr—
gimg 3%
4
i
i@ lfigfi
TE T J
+ 1,9
0.95
‘0"
o
q
nnnnnn
in“
age
MC74VHC1G08, MC74VHC1GT08
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10
PACKAGE DIMENSIONS
TSOP−5
CASE 483−02
ISSUE M
0.7
0.028
1.0
0.039
ǒmm
inchesǓ
SCALE 10:1
0.95
0.037
2.4
0.094
1.9
0.074
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
DIM MIN MAX
MILLIMETERS
A
B
C0.90 1.10
D0.25 0.50
G0.95 BSC
H0.01 0.10
J0.10 0.26
K0.20 0.60
M0 10
S2.50 3.00
123
54 S
A
G
B
D
H
C
J
__
0.20
5X
CAB
T0.10
2X
2X T0.20
NOTE 5
CSEATING
PLANE
0.05
K
M
DETAIL Z
DETAIL Z
TOP VIEW
SIDE VIEW
A
B
END VIEW
1.35 1.65
2.85 3.15
mches
,,,+ 7""?
p A
\
\
\
7774, if ”,in7
\i\ i\
‘ifi‘fl
T
r
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11
PACKAGE DIMENSIONS
SOT−553, 5 LEAD
CASE 463B
ISSUE C
1.35
0.0531
0.5
0.0197
ǒmm
inchesǓ
SCALE 20:1
0.5
0.0197
1.0
0.0394
0.45
0.0177
0.3
0.0118
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
eM
0.08 (0.003) X
b5 PL
A
c
−X−
−Y−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
D
E
Y
12 3
45
L
HEDIM
A
MIN NOM MAX MIN
MILLIMETERS
0.50 0.55 0.60 0.020
INCHES
b0.17 0.22 0.27 0.007
c
D1.55 1.60 1.65 0.061
E1.15 1.20 1.25 0.045
e0.50 BSC
L0.10 0.20 0.30 0.004
0.022 0.024
0.009 0.011
0.063 0.065
0.047 0.049
0.008 0.012
NOM MAX
1.55 1.60 1.65 0.061 0.063 0.065
HE
0.08 0.13 0.18 0.003 0.005 0.007
0.020 BSC
j
‘k
4 L
A
«BM
l‘l‘V—I
u
www.cnsemi.com
MC74VHC1G08, MC74VHC1GT08
www.onsemi.com
12
PACKAGE DIMENSIONS
SOT−953
CASE 527AE
ISSUE E
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
E
D
C
A
HE
123
45
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
DIM MIN NOM MAX
MILLIMETERS
A0.34 0.37 0.40
b0.10 0.15 0.20
C0.07 0.12 0.17
D0.95 1.00 1.05
E0.75 0.80 0.85
e0.35 BSC
L
0.95 1.00 1.05
HE
X
Y
PIN ONE
INDICATOR
b
5X
X0.08 Y
L
5X
L3
L2
e
5X
5X
L2 0.05 0.10 0.15
L3 −−− −−− 0.15
0.175 REF
TOP VIEW
SIDE VIEW
BOTTOM VIEW 1.20
DIMENSIONS: MILLIMETERS
0.20
5X
1
PACKAGE
OUTLINE
0.35
PITCH
0.35
5X
EEK)
{é
E
E
r)
BOTTOM VIEW
MC74VHC1G08, MC74VHC1GT08
www.onsemi.com
13
PACKAGE DIMENSIONS
UDFN6, 1.45x1.0, 0.5P
CASE 517AQ
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
A
B
E
D
BOTTOM VIEW
b
e
6X
0.10 B
0.05
AC
C
L6X
NOTE 3
0.10 C
PIN ONE
REFERENCE
TOP VIEW
0.10 C
6X
A
A1
0.05 C
0.05 C
CSEATING
PLANE
SIDE VIEW
13
46
DIM MIN MAX
MILLIMETERS
A0.45 0.55
A1 0.00 0.05
b0.20 0.30
D1.45 BSC
E1.00 BSC
e0.50 BSC
L0.30 0.40
L1 −−− 0.15
DIMENSIONS: MILLIMETERS
0.30
6X
1.24
0.53
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
0.50
1
MOUNTING FOOTPRINT
PACKAGE
OUTLINE
L1
DETAIL A
L
OPTIONAL
CONSTRUCTIONS
L
DETAIL B
MOLD CMPDEXPOSED Cu
OPTIONAL
CONSTRUCTIONS
A2 0.07 REF
6X
A2
DETAIL B
DETAIL A
m on:
azrsnzuc:\_, , 7 ,
1D
um um MAX
E- C TOP VIEW ” 5“ U 5
sane“
W X ¢ ‘73:ng
|:n:||:|
ALTERNA‘IE U 2“ U “3
Emma‘s»
u.
U26 as:
v i * CONS'IRUCTION
Q 005 c + J‘ T:
A1
SIDE VIEW
52mm;
”LANE RECOMMENDED
SOLDERING FOOTPRINT“
EX L 5X
5x0.25-1 re 052
1] ‘ [:5
r 7 7 1.20
mas/+4] ‘EQ
O ‘ ‘ 4 F035
0
PITCH
DIMENSION M‘LUMETERS
"01::
BOTTOM VIEW
'Fer addmonal mmrmamn on our Pb-Free s1ra1egy and so‘denng
delafls‘ p‘ease download me ON Semiconduclov Somering and
Meummg Techmques Reference Manual, SOLDEHRM/D.
u a e Mama“ at Semnam Campunems In
wwmm cumysueygumem WW gm
MC74VHC1G08, MC74VHC1GT08
www.onsemi.com
14
PACKAGE DIMENSIONS
UDFN6, 1x1, 0.35P
CASE 517BX
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
6X
6X
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
DIMENSION: MILLIMETERS
RECOMMENDED
L1
DETAIL A
L
ALTERNATE TERMINAL
CONSTRUCTION
DETAIL B
MOLD CMPDEXPOSED Cu
ALTERNATE
CONSTRUCTION
0.52
1.20
0.25
0.35
PITCH
PACKAGE
OUTLINE 1
DIM MIN MAX
MILLIMETERS
A0.50 0.65
A1 0.00 0.05
A3 0.13 REF
b0.17 0.23
D1.00 BSC
E1.00 BSC
e0.35
L0.20 0.40
L1 −−− 0.15
L3
L3 0.26 0.33
A B
E
D
BOTTOM VIEW
b
e
6X
L6X
NOTE 3
0.08 C
PIN ONE
REFERENCE
TOP VIEW
0.08 C
A
A1
0.05 C
0.05 C
CSEATING
PLANE
SIDE VIEW
13
46
2X
2X
A3
DETAIL B
A
M
0.07 BC
M
0.05 C
DETAIL A
MC74VHC1G08/D
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